vishay siliconix tp0101k document number: 72692 s-83053-rev. b, 29-dec-08 www.vishay.com 1 p-channel 20-v (d-s) mosfet, low-threshold features ? halogen-free according to iec 61249-2-21 available ? trenchfet ? power mosfet ? esd protected: 3000 v applications ? drivers: relays, solenoids , lamps, hammers, displays, memories ? battery operated systems, dc/dc converters ? power supply converter circuits ? load/power switching-cell phones, pagers notes: a. pulse width limited by maximum junction temperature. b. surface mounted on fr4 board, t 10 s. notes: a. pulse width limited by maximum junction temperature. b. surface mounted on fr4 board, t 10 s. product summary v ds (v) r ds(on) ( ) i d (a) e - 20 0.65 at v gs = - 4.5 v - 0.58 0.85 at v gs = - 2.5 v - 0.5 g s d to p v ie w 2 3 to-236 (sot-23) 1 ordering information: marking code: k4ywl k4 = part nu m b er code for tp0101k y = year code w = week code l = lot tracea b ility d s g 100 tp0101k-t1-e3 (lead (p b )-free) TP0101K-T1-GE3 (lead (p b )-free and halogen-free) absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds - 20 v gate-source voltage v gs 8 continuous drain current (t j = 150 c) b t a = 25 c i d - 0.58 a t a = 70 c - 0.46 pulsed drain current a i dm - 2 continuous source-drain (diode current) b i s - 0.3 power dissipation b t a = 25 c p d 0.35 w t a = 70 c 0.22 operating junction and storage temperature range t j , t stg - 55 to 150 c thermal resistance ratings parameter symbol limits unit thermal resistance, junction-to-ambient b r thja 357 c/ w
www.vishay.com 2 document number: 72692 s-83053-rev. b, 29-dec-08 vishay siliconix tp0101k notes: a. pulse test; pulse width 300 s, duty cycle 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications t a = 25 c, unless otherwise noted parameter symbol test conditions limits min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = - 10 a - 20 v gate threshold voltage v gs(th) v ds = v gs , i d = - 50 a - 0.5 - 0.7 - 1.0 gate-body leakage i gss v ds = - 0 v, v gs = 4.5 v 5 a zero gate voltage drain current i dss v ds = - 20 v, v gs = 0 v - 1 v ds = - 20 v, v gs = 0 v, t j = 55 c - 10 on-state drain current a i d(on) v ds - 5 v, v gs = - 4.5 v - 1.2 a v ds - 5 v, v gs = - 2.5 v - 0.5 drain-source on-state resistance a r ds(on) v gs = - 4.5 v, i d = - 0.58 a 0.42 0.65 v gs = - 2.5 v, i d = - 0.5 a 0.64 0.85 forward transconductance a g fs v ds = - 5 v, i d = - 0.58 a 1300 ms diode forward voltage a v sd i s = - 0.3 a, v gs = 0 v - 0.9 - 1.2 v dynamic b total gate charge q g v ds = - 6 v, v gs = - 4.5 v i d ? - 0.58 a 1400 2200 pc gate-source charge q gs 300 gate-drain charge q gd 250 gate resistance r g 150 tu r n - o n t i m e t d(on) v dd = - 6 v, r l = 10 i d ? - 0.58 a, v gen = - 4.5 v, r g = 6 25 35 ns t r 30 45 turn-off time t d(off) 55 85 t f 38 60
document number: 72692 s-83053-rev. b, 29-dec-08 www.vishay.com 3 vishay siliconix tp0101k typical characteristics 25 c, unless otherwise noted output characteristics on-resistance vs. drain current and gate voltage gate charge 0.0 0.4 0. 8 1.2 1.6 2.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v gs = 5 thr u 3 v 1 v v ds - drain-to-so u rce v oltage ( v ) - drain c u rrent (a) i d 2 v 1.5 v 2.5 v - on-resistance ( ) r ds(on) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 i d - drain c u rrent (a) v gs = 2.5 v v gs = 4.5 v 0 1 2 3 4 5 0.0 0.3 0.6 0.9 1.2 1.5 v ds = 6 v i d = 0.6 a - gate-to-so u rce v oltage ( v ) q g - total gate charge (nc) v gs transfer characteristics capacitance on-resistance vs. junction temperature 0.0 0.4 0. 8 1.2 1.6 2.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t j = - 55 c 125 c 25 c v gs - gate-to-so u rce v oltage ( v ) - drain c u rrent (a) i d 0 25 50 75 100 125 150 175 200 04 8 12 16 20 v ds - drain-to-so u rce v oltage ( v ) c rss c oss c iss c - capacitance (pf) 0.7 0.9 1.1 1.3 1.5 1.7 - 50 - 25 0 25 50 75 100 125 150 v gs = 4.5 v i d = 0.6 a t j - j u nction temperat u re (c) ( n ormalized) - on-resistance r ds(on)
www.vishay.com 4 document number: 72692 s-83053-rev. b, 29-dec-08 vishay siliconix tp0101k typical characteristics 25 c, unless otherwise noted source-drain diode forward voltage threshold voltage single pulse power, junction-to-ambient 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 1.4 1.6 t j = 150 c t j = 25 c 4 0.1 0.001 v sd -) v ( e g a t l o v n i a r d - o t - e c r u o s - so u rce c u rrent (a) i s 1 0.01 - 0.2 - 0.1 0.0 0.1 0.2 0.3 0.4 - 50 - 25 0 25 50 75 100 125 150 i d = 50 a v ariance ( v ) v gs(th) t j - temperat u re (c) 0 1 5 po w er (w) time (s) 3 4 0 0 6 110 0.1 0.01 2 100 on-resistance vs. gate-to-source voltage gate current vs. gate-source voltage safe operating area, junction-to-ambient 0.0 0.5 1.0 1.5 2.0 2.5 3.0 012345 i d = 0.6 a - on-resistance ( ) r ds(on) v gs - gate-to-so u rce v oltage ( v ) 0.001 100 100 000 0.1 1 10 1000 - gate c u rrent ( a) i gss 0 26 8 10 t j = 25 c t j = 150 c 0.01 4 v gs - gate-to-so u rce v oltage ( v ) 10 000 10 0.1 0.1 1 10 100 0.001 1 t a = 25 c single p u lse - drain c u rrent (a) i d 0.01 i dm limited i d(on) limited b v dss limited 10 ms 100 ms dc 1 s 10 s 1 ms r * ds(on) limited v ds - drain-to-so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified
document number: 72692 s-83053-rev. b, 29-dec-08 www.vishay.com 5 vishay siliconix tp0101k typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72692 . normalized thermal transient impedance, junction-to-ambient 10 -3 10 -2 0 0 6 0 1 1 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single p u lse d u ty cycle = 0.5 sq u are wa v e p u lse d u ration (s) n ormalized effecti v e transient thermal impedance
vishay siliconix package information document number: 71196 09-jul-01 www.vishay.com 1 sot-23 (to-236): 3-lead b e e 1 1 3 2 s e e 1 d a 2 a a 1 c s e a ting pl a ne 0.10 mm 0.004" c c l 1 l q g au ge pl a ne s e a ting pl a ne 0.25 mm dim millimeters inches min max min max a 0.89 1.12 0.0 3 5 0.044 a 1 0.01 0.10 0.0004 0.004 a 2 0.88 1.02 0.0 3 46 0.040 b 0. 3 5 0.50 0.014 0.020 c 0.085 0.18 0.00 3 0.007 d 2.80 3 .04 0.110 0.120 e 2.10 2.64 0.08 3 0.104 e 1 1.20 1.40 0.047 0.055 e 0.95 bsc 0.0 3 74 ref e 1 1.90 bsc 0.0748 ref l 0.40 0.60 0.016 0.024 l 1 0.64 ref 0.025 ref s 0.50 ref 0.020 ref q 3 8 3 8 ecn: s-0 3 946-rev. k, 09-jul-01 dwg: 5479
an807 vishay siliconix document number: 70739 26-nov-03 www.vishay.com 1 mounting little foot sot-23 power mosfets wharton mcdaniel surface-mounted little foot power mosfets use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. see application note 826, recommended minimum pad patterns with outline drawing access for vishay siliconix mosfet s, ( http://www.vishay.com/doc?72286 ), for the basis of the pad design for a littl e foot sot-23 power mosfet footprint . in converting this footprint to the pad set for a power device, designers must make tw o connections: an electrical connection and a thermal connection, to draw heat away from the package. the electrical connections for the sot-23 are very simple. pin 1 is the gate, pin 2 is the source, and pin 3 is the drain. as in the other little foot packages, the drai n pin serves the additional function of providing the thermal connection from the package to the pc board. the total cross section of a copper trace connected to the drain may be adequate to carry the current required for the application, but it may be inadequate thermally. also, heat spreads in a circular fashion from the heat source. in this case the drain pin is the heat source when looking at heat spread on the pc board. figure 1 shows the footprint with copper spreading for the sot-23 package. this pattern shows the starting point for utilizing the board area available for the heat spreading copper. to create this pattern, a plane of copper over lies the drain pin and provides planar copper to draw heat from the drain lead and start the process of spreading the heat so it can be dissipated into the ambient air. this pattern uses all the available area underneath the body for this purpose. figure 1. footprint with copper spreading 0.114 2.9 0.059 1.5 0.0394 1.0 0.037 0.95 0.150 3.8 0.081 2.05 since surface-mounted packages are small, and reflow soldering is the most common way in whic h these are affixed to the pc board, ?thermal? connections from the planar copper to the pads have not been used. even if additional planar copper area is used, there should be no problems in the soldering process. the actual solder connections are defined by the solder mask openings. by combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. a final item to keep in mind is the width of the power traces. the absolute minimum power trace width must be determined by the amount of current it has to carry. for thermal reasons, this minimum width should be at least 0.020 inches. the use of wide traces connected to the drain plane provides a low-impedance path for heat to move away from the device.
application note 826 vishay siliconix document number: 72609 www.vishay.com revision: 21-jan-08 25 application note recommended minimum pads for sot-23 0.106 (2.692) recommended mi nimum pads dimensions in inches/(mm) 0.022 (0.559) 0.049 (1.245) 0.029 (0.724) 0.037 (0.950) 0.053 (1.341) 0.097 (2.459) return to index return to index
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.
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